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The company was founded in in Cupertino, California. It remained independent until , when it became a server division within Compaq. Tandem's NonStop systems use a number of independent identical processors and redundant storage devices and controllers to provide automatic high-speed " failover " in the case of a hardware or software failure.
To contain the scope of failures and of corrupted data, these multi-computer systems have no shared central components, not even main memory. Conventional multi-computer systems all use shared memories and work directly on shared data objects. Instead, NonStop processors cooperate by exchanging messages across a reliable fabric, and software takes periodic snapshots for possible rollback of program memory state.
Besides handling failures well, this " shared-nothing " messaging system design also scales extremely well to the largest commercial workloads. Each doubling of the total number of processors would double system throughput, up to the maximum configuration of processors. In contrast, the performance of conventional multiprocessor systems is limited by the speed of some shared memory, bus, or switch.
Adding more than 4—8 processors that way gives no further system speedup. NonStop systems have more often been bought to meet scaling requirements than for extreme fault tolerance. They compete well against IBM's largest mainframes, despite being built from simpler minicomputer technology.
Tandem Computers was founded in by James Jimmy Treybig. Treybig first saw the market need for fault tolerance in OLTP online transaction processing systems while running a marketing team for Hewlett Packard 's HP computer division, but HP was not interested in developing for this niche. Their business plan called for ultra-reliable systems that never had outages and never lost or corrupted data.
These were modular in a new way that was safe from all " single-point failures ", yet would be only marginally more expensive than conventional non-fault-tolerant systems. They would be less expensive and support more throughput than some existing ad-hoc toughened systems that used redundant but usually required "hot spares".
Each engineer was confident they could quickly pull off their own part of this tricky new design, but doubted that others' areas could be worked out. The parts of the hardware and software design that did not have to be different were largely based on incremental improvements to the familiar hardware and software designs of the HP Many subsequent engineers and programmers also came from HP.
Tandem headquarters in Cupertino, California , were a quarter mile away from the HP offices. Initial venture capital investment in Tandem Computers came from Tom Perkins, who was formerly a general manager of the HP division. The business plan included detailed ideas for building a unique corporate culture reflecting Treybig's values.
The company enjoyed uninterrupted exponential growth up through Within each series, there have been several major re-implementations as chip technology progressed. While conventional systems of the era, including large mainframes , had mean-time-between-failures MTBF on the order of a few days, the NonStop system was designed to failure intervals times longer, with uptimes measured in years.
Nevertheless, the NonStop was designed to be price-competitive with conventional systems, with a simple 2-CPU system priced at just over twice that of a competing single-processor mainframe, as opposed to four or more times of other fault-tolerant solutions.
Each disk controller or network controller was duplicated and had dual connections to both CPUs and devices. Each disk was mirrored, with separate connections to two independent disk controllers. If a disk failed, its data was still available from its mirrored copy. Each disk or network controller was connected to two independent CPUs.
Power supplies were each wired to only one side of some pair of CPUs, controllers, or buses, so that the system would keep running well without loss of connections if one power supply failed. The careful complex arrangement of parts and connections in customers' larger configurations were documented in a Mackie diagram , named after lead salesman David Mackie who invented the notation. This prompt detection is called "fail fast".
The point was to find and isolate corrupted data before it was permanently written into databases and other disk files. It was greatly influenced by the HP minicomputer.
They were both microprogrammed , bit , stack-based machines with segmented, bit virtual addressing. Both were intended to be programmed exclusively in high-level languages, with no use of assembler. Both had a small number of top-of-stack, bit data registers plus some extra address registers for accessing the memory stack. Both used Huffman encoding of operand address offsets, to fit a large variety of address modes and offset sizes into the bit instruction format with very good code density.
Both relied heavily on pools of indirect addresses to overcome the short instruction format. Both supported larger and bit operands via multiple ALU cycles, and memory-to-memory string operations.
Both used "big-endian" addressing of long versus short memory operands. These features had all been inspired by Burroughs BB mainframe stack machines.
Paging and long addresses was critical for supporting complex system software and large applications. The bit address spaces were already too small for major applications when it shipped. This was an efficient machine-dependent systems programming language for operating systems, compilers, etc.
In contrast to all other commercial operating systems, Guardian was based on message passing as the basic way for all processes to interact, without shared memory, regardless of where the processes were running. The slave process periodically took snapshots of the master's memory state, and took over the workload if and when the master process ran into trouble.
This allowed the application to survive failures in any cpu or its associated devices, without data loss. It further allowed recovery from some intermittent-style software failures. Some major early applications were directly coded in this checkpoint style, but most instead used various Tandem software layers which hid the details of this in a semi-portable way.
Unfortunately, visible registers remained bit, and this unplanned addition to the instruction set required executing many instructions per memory reference compared to most bit minicomputers. All subsequent TNS computers were hampered by this instruction set inefficiency. Also, the NonStop II lacked wider internal data paths and so required additional microcode steps for bit addresses. It had Tandem's first use of cache memory.
It had a more direct implementation of bit addressing, but still sent them through bit adders. A wider microcode store allowed a major reduction in the cycles executed per instruction; speed increased to 2.
It used the same rack packaging, controllers, backplane, and buses as before. This allowed further scale-up for taking on the largest mainframe applications. Worldwide clusters of CPUs could also be built via conventional long-haul network links. NonStop SQL is famous for scaling linearly in performance with the number of nodes added to the system, whereas most databases had performance that plateaued quite quickly, often after just two CPUs. A later version released in added transactions that could be spread over nodes, a feature that remained unique for some time.
Its small cabinet could be installed into any "copier room" office environment. The CPU core chip was duplicated and lock stepped for maximal error detection. Pinout was a main limitation of this chip technology. As a result, CLX required at least two machine cycles per instruction. In Tandem introduced the NonStop Cyclone , a fast but expensive system for the mainframe end of the market. Despite being microprogrammed, the CPU was superscalar , often completing two instructions per cache cycle.
This was accomplished by having a separate microcode routine for every common pair of instructions. Cyclone processors were packaged as sections of four CPUs each, and the sections joined by a fiber optic version of Dynabus. Like Tandem's prior high end machines, Cyclone cabinets were styled with lots of angular black to suggest strength and power. Cyclone's name was supposed to represent its unstoppable speed in roaring through OLTP workloads. Announcement day was October 17 and the press came to town.
That afternoon, the region was struck by the magnitude 6. Tandem offices were shaken, but no one was badly hurt on site. This was the first and last time that Tandem named its products after a natural disaster. Rainbow's hardware was a bit register-file machine that aimed to be better than a VAX. For reliable programming, the main programming language was "TPL", a subset of Ada.
At that time, people barely understood how to compile Ada to unoptimized code. The OS and database and Cobol compilers were entirely redesigned.
Customers would see it as a totally disjoint product line requiring all-new software from them. The software side of this ambitious project took much longer than planned. The hardware was already obsolete and out-performed by TXP before its software was ready, so the Rainbow project was abandoned. All subsequent efforts emphasized upward compatibility and easy migration paths.
Sadly, numerous design compromises including a unique based hardware platform incompatible with expansion cards of the day and extremely limited compatibility with IBM -based PCs relegated the Dynamite to serving primarily as a smart terminal. It was quietly and quickly withdrawn from the market. Tandem's message-based NonStop operating system had advantages for scaling, extreme reliability, and efficiently using expensive "spare" resources. But many potential customers wanted just good-enough reliability in a small system, using a familiar Unix operating system and industry-standard programs.
Tandem's various fault-tolerant competitors all adopted a simpler hardware-only memory-centric design where all recovery was done by switching between hot spares. In such systems, the spare processors do not contribute to system throughput between failures, but merely redundantly execute exactly the same data thread as the active processor at the same instant, in "lock step". Faults are detected by seeing when the cloned processors' outputs diverged.
To detect failures, the system must have two physical processors for each logical, active processor. To also implement automatic failover recovery, the system must have three or four physical processors for each logical processor. The triple or quadruple cost of this sparing is practical when the duplicated parts are commodity single-chip microprocessors.
It was developed in Austin TX. Their fast clocks could not be synchronized as in strict lock stepping, so voting instead happened at each interrupt. Pairs of processors ran in lock-step to check each other. When they disagreed, both processors were marked untrusted and their workload was taken over by a hot-spare pair of processors whose state was already current.